Various design applications require fabrication of planar spiral inductors of a variety of specified inductance values on monolithic integrated circuits. In many such cases, the inductance may have a value which is to be determined after measurement of other components of the integrated circuit.
For example, impedance matching of the input stage of an amplifier may require an inductance different from that anticipated by the design. Another example relates to the frequency of LC-type oscillators in which the frequency of such oscillators is determined by an inductor and capacitor in parallel, namely ƒ=1/(2π√{square root over (LC)}), where f is the frequency, L is the value of the inductance and C is the value of the capacitance. Such oscillators are required, for example, in phase locked loops (PLLs).
In integrated circuits, the capacitor is typically a varactor that is a variable capacitor composed of a semiconductor device, such as a metal oxide semiconductor field effect transistor (MOSFET), where the value of capacitance is determined by a voltage applied to a terminal of the device, e.g., the gate of a MOSFET. The inductor is fixed by the designed metal geometry used to fabricate it. A varactor has a limited range of capacitance variation (tuning range), and if, due to manufacturing variation, it does not have its intended value, its tuning range may not be sufficient to permit the oscillator to operate at the designed frequency.
Similarly, the design of an integrated circuit containing a tuned oscillator may be sufficient to cover several frequency bands if the oscillator frequency could be adjusted as a final processing step. The varactor does not generally have sufficient tuning range, but if the inductor can be varied, the same circuit design can be used to fabricate circuits of various central frequencies.
H. Sugawara et al., “High-Q Variable Inductor Using Redistributed Layers for Si RF Circuits,” 2004 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems,” pp. 187-190, Atlanta, 2004, discloses a technique for placement of a metal plate above a planar spiral inductor to reduce the inductance value of the planar spiral inductor. In particular, the metal plate is moved above the inductor by micromechanical action in order to attempt to obtain the desired inductance value. Such technique is illustrated in FIG. 1 wherein the planar spiral inductor is denoted by reference numeral 10, the metal plate is denoted by reference numeral 12, and the micromechanical action is denoted by reference numeral 14. The inductance of planar spiral inductor 10 is lowered as metal plate 12 overlaps a larger portion of the inductor. The change in inductance is explained by the eddy currents in the metal plate acting to oppose the magnetic flux of the inductor, and hence reducing its inductance.
In addition, P. Park et al., “Variable Inductance Multilayer Inductor with MOSFET Switch Control,” IEEE Electron Device Letters, 25, pp. 144-146, 2004, and Y. Yokoyama et al., “On-Chip Variable Inductor Using Micromechanical Systems Technology,” Japanese Journal of Applied Physics, 42, pp. 2190-2192, 2003, disclose other techniques for fabricating variable on-chip inductors.
However, each of these techniques relies on a complex feedback adjustment, i.e., micromechanical action in H. Sugawara et al. and Y. Yokoyama et al., and active FET control in P. Park.